In the 2nd generation MSX homecomputers (MSX2), a new mechanism was introduced to enable RAM sizes significantly larger than found in MSX1 machines, and easy to use for programmers. This mechanism was called a "memory mapper", supporting sizes of 64 KB up to 4 MB.
Back then a typical memory mapper consisted of about a dozen 74xx family IC's and a bank of DRAM chips. These days cheap, high-density RAM chips and programmable logic components enable building the same, using only a few IC's.
A while ago I got myself familiar with some of these programmable logic devices. And as a hobbyist occasionally dealing with MSX computers, a memory mapper came to mind as a nice real-world application to try. This page documents the result - serving as 'inspiration', or as a building block in other people's projects.
The memory mapper I constructed, reduces chip count to the minimum of 2: a 512K x 8 bit static RAM, and a small CPLD (Complex Programmable Logic Device) containing the control logic. Why 512 KB?
The design involved a lot of design-build-test cycles, building & testing hardware on a range of 20+ year old homecomputers is a very time-consuming business! First version was built on an experimentation cartridge that I used in the past for other MSX hardware projects. As it turned out, the non-optimal layout of this board caused some power supply issues - resulting in rare, but sticky problems. Also wiring was a mess and this board lacked gold-plated contacts, occasionally causing additional errors.
Therefore (by the time my design was more or less finalized) I grabbed a Konami-sized cartridge & modified that to contain SRAM chip, the CPLD and a few other small parts.
|(click for larger view, full-resolution versions are included in the download)|
After fixing the last issues, I did a final, full set of tests on different MSX models, using diagnostic / test programs & games. In this final set of tests, the memory mapper performed flawless.
Can be grabbed here (1.7 MB).
A memory mapper is a fairly generic mechanism: on the MSX there exist a number of ROM mappers, and many other systems use similar mechanisms to switch blocks of memory, to 'map' blocks into a memory region where the CPU can access it. Differences are in how many registers are used, how many bits they contain, how they are written, and what size blocks are switched in which memory regions.
Therefore it isn't hard to view this memory mapper as a generic mapper design, change the control logic & number of register bits as desired, and thus produce another type of mapper. Like the kind that switches blocks in Konami MegaROMs. Often a ROM mapper might be simpler since the registers aren't read back, this does away with a significant part of the logic.
There is nothing that prevents you from tacking an MSX-style memory mapper onto a totally different machine like a ZX Spectrum or Commodore 64...
In general, I don't build this kind of hardware for hire, and haven't done so for a long time. You are free to ask, but the answer will likely be "NO". For me this is a combination of hobby & learning exercise, producing such things in numbers is not commercially viable. That's what this page is for: to make it easier for you to understand how it works, and Do-It-Yourself.
But I would like to hear if this info helped you to create your own project(s)!
For hobbyists, PLCC parts are much easier to solder wires onto than VQFP packages. However: they also take up more space...
Slower CPLD parts (like -10 and perhaps -15 speed grades) are probably okay. If needed, you can change the macrocell power setting and generate a new (.jed) configuration file.
These days, 9500XL family parts are easier to find & often cheaper. But remember these are 3.3V parts! Successfully & reliably using these in 5V systems may not be worth the trouble, especially in small projects like this.
For an external MSX memory mapper (in cartridge form, that is) further minimization is possible, but only in a few ways:
Last update: 25 August 2011